QuantumATK Forum

QuantumATK => Scripts, Tutorials and Applications => Topic started by: techenthusiast on December 13, 2024, 06:43

Title: Device geometry optimization_Cylindrical GAA_ CNTFET_10nm Channel Giving High SS
Post by: techenthusiast on December 13, 2024, 06:43

Dear All,

To ask :
Good morning. I have attached a one.py structure file of Cylindrical GAA CNT FET OF 10nm Channel length. The observation is that it provides high SS, 216mV/Decade. This may be due to the Short-channel Effect. Kindly advise if there is any provision to optimize the device geometry for better performance regarding electrical parameters of an FET such as SS, and Ioff...

Thank You.

Title: Re: Device geometry optimization_Cylindrical GAA_ CNTFET_10nm Channel Giving High SS
Post by: techenthusiast on December 16, 2024, 11:55

Dear All,

Also,  As per NEGF Formation we can make only single channel CNT (10,0) using  "Device from bulk " . Is that possible to make multiple CNT Channel using the same formation with single Source or drain electrode & corresponding electrode extensions?  Thank You.