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General Questions and Answers / Re: How to get the correct color scale for PLDOS?
« on: March 15, 2025, 15:18 »
Thank you very much for your reply!
I have a few questions to ask
1.
Is it reasonable that the DOS near the edge of the valence band in the attached picture is discretely distributed?
Because I calculated that several structures have this phenomenon.
2.
I still want to know how high the barrier near the interface is.
The way I found the interface barrier in the tutorial is to use Arrhenius-like plot.
https://docs.quantumatk.com/casestudies/ag_si_interface/ag_si_interface.html
Is this method applicable to field effect transistors?
There is also a mention of the Hartree difference potential method in the link.
I would like to ask if the Hartree difference potential method is still applicable when gate bias is applied to the component?
If none of the above methods are used, are there any other methods?
Thank you so much!
I have a few questions to ask
1.
Is it reasonable that the DOS near the edge of the valence band in the attached picture is discretely distributed?
Because I calculated that several structures have this phenomenon.
2.
I still want to know how high the barrier near the interface is.
The way I found the interface barrier in the tutorial is to use Arrhenius-like plot.
https://docs.quantumatk.com/casestudies/ag_si_interface/ag_si_interface.html
Is this method applicable to field effect transistors?
There is also a mention of the Hartree difference potential method in the link.
I would like to ask if the Hartree difference potential method is still applicable when gate bias is applied to the component?
If none of the above methods are used, are there any other methods?
Thank you so much!