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Topics - weixiang

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16
Dear experts,
I am studying the the e-ph effect in GNR transistor devices using the STD method. I calculated the PLDOS for the pristine as well as STD configuration of a GNR device using both EH and DFT method.  In the following images, the left one is the PLDOS result for pristine configuration using EH method, (test3_0.0V_pristine_start_point.py) the middle one is the PLDOS of STD configuration using EH method, (test3_0.0V_start_point_EH.py) and finally the right one is the PLDOS of STD configuration using the DFT method. (test3_0.0V_start_point_DFT.py)


It is noticed that the left and the middle PLDOS are similar, only except that the middle PLDOS is messier.
Realized that the EH method is not suitable for calculating non-perfect configurations like STD, I tried to use the DFT method to do PLDOS calculation as shown in the right image. However the right image looks different from the other two in that the middle band gap region shifted down.

 I believe  there must be one of them being wrong.  Then I calculated PLDOS for a pristine configuration using both EH and DFT method as shown in following images: the left one is for EH method (test_EH.py) and the right one is for DFT method (test_DFT.py)



The two results are different,  the DFT one has small band gap while the EH one has larger band gap. What would be possible reason for this difference?
I have attached all my scripts for calculating these PLDOS and bold their names.
I don't if there is any setup that I did improperly in my DFT scripts, Please advice if I am wrong.


17
Dear experts,
Hi,
I have calculated the Projected local density of states (PLDOS) for a GNR device, with left/right electrodes&extensions p-doped and n-doped, respectively. The device and the corresponding PLDOS are shown as follows:


The PLDOS looks very reasonable since the left and right sides are p-doped and n-doped, the Fermi Level increase at the left side and decrease at the right side, while for the remaining undoped middle part, the Fermi level is at the middle. (Attached file test2.py)

Then I tried to include a gate in the middle without applying any gate voltage, and also calculated the PLDOS, their are shown as follows: (Attached file test3.py)



You can notice that just by introduce a gate in the middle, the Fermi level of the middle region increase to be the same as the left side. Why could this happen even when there is no gate voltage at all?
Initially I thought this could be some kind of Fermi level pinning effect, but I rejected this thought later since Fermi level pinning occurs where there is a surface state ( between semiconductor and Vacuum or between semiconductor and metal). But in my device there is no surface state in the middle.
I am stuck in interpreting this result and cannot understand what is the effect of the very existence of a gate region in my device. Can you help me explain it?

Any help will be appreciated!

18
Dear Sir,
I am studying the the inelastic current of a graphene nanoribbon Based TFET device using the STD method.

 I have read through the case studyhttps://docs.quantumwise.com/casestudies/std_transport/std_transport.html on Si device and trying to do the same thing on a GNR based device. So basically I  first computed the dynamic matrix of my device (GNR_PN_dynmat.py), then I computed the corresponding std configuration of my device (std-300k.py), next I started a loop to calculate the DeviceConfiguration at different bias voltage(300K_iv_scf.py), finally I calculated the transmission spectrum at these bias voltage (300K_transmission.py). The procedure is same as shown in the case study. The only difference is that I used a different forcefield potential Tersoff_CH_2010, since the materials is carbon rather than Silicon. And I used the Extended Huckel calculator rather than the DFT-LCAO calculator to calculated the DeviceConfiguration and transmission spectrum.
But the hard part is that the DeviceConfiguration calculation is very difficult to get converged.  Actually most of them did not converged at the max step. As a result the calculated current is oscillating wildly, making it hard to interpret:

The result is very unreasonable to me, and I don't know if it is solely due to the unconverged calculation.
So, can any one help me with:
(1)  why is the STD calculation so hard to get converged, and is there any specific advice for increase the convergence chance for my device calculation?
(2) If the calculation converged at all bias points will the oscillation diminishes, and the current curve looks more reasonable?

19
Hello experts,
I am studying the e-ph interaction effect in graphene nanoribbon transistor device, and I have read through some Quantumwise case study page https://docs.quantumwise.com/tutorials/inelastic_current_in_si_pn_junction/inelastic_current_in_si_pn_junction.html
as well as the STD  case study for Si p-n junction in paper Phys. Rev. B 96, 161404(R). I got the idea that phonon will have the positive effect that increases the off-state current by several magnitudes (the phonon-assisted tunneling), while unchanging the on state current.
However other papers speak otherwise. In paper  PhysRevB.80.155430, they studied Si nanowire and their simulation shows an opposite result that the off-state current is rather unchanged, but the on-state current is reduced because of the phonon scattering. Some other paper also indicates so. For example in a paper named " Role of phonon scattering in graphene nanoribbon transistors: Nonequilibrium Green’s function method with real space approach" They also give a similar result for GNR transistor.

I just wonder why does the STD method give an opposite result than others? Is there anything that I misunderstand here?

Thanks!

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