Author Topic: Webinar with IBM Research: Simulating Alternative Metals for Interconnects  (Read 1532 times)

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Offline Vaida Arcisauskaite

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Joint Webinar with IBM Research & Synopsys
Simulating Properties of Alternative Metals for Advanced Logic Interconnects

Date: 24th of June, 2020
Time 1: 9 AM CEST (Europe) / 12.30 pm IST (India) / 3 pm CST (China) / 4 pm KST (South Korea) / 4 pm JST (Japan)
Time 2: 12 pm EDT (US East Coast) / 9 am PDT (US West Coast)/ 6 pm CEST (Europe)
Duration: 1 hour (including Q&A session)
NOTE: please click on the drop-down menu to choose the most convenient time for you.

Register here.

Join this webinar to learn more about the joint efforts of IBM Research and Synopsys and recently developed Atomic-Scale QuantumATK to TCAD Raphael FX Workflow on supporting the exploration and eventual integration of alternative metals in advanced logic interconnect technology. This work is part of the IBM Research and Synopsys collaboration on accelerating post-FinFET process development with Design Technology Co-Optimization (DTCO) innovations.

Current issues:
Scaling of semiconductor logic technologies to the 3nm node and beyond, motivates the evaluation of new metals for the power rails and signal wires. The purpose is to mitigate the rising impact of interconnect parasitics on performance.
The current solution which is based on copper and a barrier metal shows a significant rise in resistivity as conductor widths decrease, and eventually leads to lower performance and higher IR drop.

Participate and gain insights on:

-How to simulate vertical resistance in vias, i.e., interfaces between various conductor, adhesion liners, wetting, and diffusion layers.
-How to efficiently evaluate resistance due to scattering at grain boundaries (GBs) in metals by using Sentaurus Materials Workbench (SMW) under QuantumATK. 
     -SMW automates key tasks including easily building and relaxing a large set of GBs, calculating GB reflection coefficients, and GB resistivity for different average grain sizes.
-How the results from SMW can be automatically incorporated into the TCAD Raphael FX simulations
     -For handling extraction of interconnect resistance and capacitance of complex process structures.

Presented by: 
•   Timothy Philip, PhD, Research Staff Member for IBM Research
•   Troels Markussen, PhD, Senior R&D Engineer for Synopsys QuantumATK
•   Shela Aboud, PhD, R&D Engineer for Synopsys TCAD

Audience with atomic-scale, TCAD, and technology development experiences, especially in working with advanced logic processes, will greatly benefit by attending.
You are welcome to ask questions throughout the webinar or at the end during the Q&A session.

Register here.
« Last Edit: September 9, 2020, 15:05 by Vaida Arcisauskaite »